¡ Semiconductor
ML9041
Instruction Codes
Table of Instruction Codes
Code
RS1 RS0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Execution
Time
Instruction
Function
f = 270kHz
Clears all the displayed digits of the LCD and
sets the DDRAM address 0 in the address
counter. The arbitrator data is cleared.
Display Clear
Cursor Home
1
1
0
0
0
0
0
0
0
0
0
0
1
1.52 ms
1.52 ms
Sets the DDRAM address 0 in the address
counter and shifts the display back to the
original. The content of the DDRAM
remains unchanged.
0
0
0
0
0
0
0
1
*
Determines the direction of movement of
the cursor and whether or not to shift the
display. This instruction is executed when
data is written or read.
Entry Mode Setting
1
0
0
0
0
0
0
0
1
1
I/D
S
37 ms
Sets LCD display ON/OFF (D), cursor
ON/OFF or cursor-position character
blinking ON/OFF.
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
D
C
*
*
B
*
*
37 ms
37 ms
37 ms
Displya ON/OFF Control
Cursor/Display Shift
Function Setting
Moves the cursor or shifts the display
without changing the content of the DDRAM.
Sets the interface data length (DL), the
number of display lines (N) or the type of
character font (F).
S/C R/L
DL
N
F
Sets on CGRAM address. After that,
CGRAM data is transferred to and from
the CPU.
1
1
1
0
0
0
0
0
1
0
1
1
37 ms
37 ms
0 ms
CGRAM Address Setting
DDRAM Address Setting
Busy Flag/Address Read
ACG
Sets a DDRAM address. After that DDRAM
data is transferred to and from the CPU.
ADD
ADC
Reads the Busy Flag (indicating that the
ML9041 is operating) and the content of
BF
the address counter.
Writes data in DDRAM, ABRAM or CGRAM.
WRITE DATA
READ DATA
RAM Data Write
1
1
0
0
0
1
1
0
0
0
0
1
0
0
1
37 ms
37 ms
37 ms
37 ms
37 ms
Reads data from DDRAM, ABRAM or CGRAM.
RAM Data Read
Arbitrator Display Line Set
Contrast Control Data Write
Contrast Control Data Read
0
0
0
0
0
0
0
1
0
0
0
0
1
AS Sets the arbitrator display line.
Writes data to control the contrast of the LCD.
Reads data to control the contrast of the LCD.
WRITE (Contrast Data) DATA
READ (Contrast Data) DATA
Sets an ABRAM address. After that
ABRAM data is transferred to and from
the CPU.
AAB
ABRAM address setting
0
0
0
0
1
1
37 ms
DD RAM
CG RAM
ABRAM
ACG
: Display data RAM
: Character generator RAM
: Arbitrator data RAM
: CGRAM address
: DDRAM address (Corresponds to
the cursor address)
: ABRAM address
: Address counter (Used by DDRAM,
ABRAM and CGRAM)
I/D = "1" (Increment)
I/D = "0" (Decrement)
The
execution
time is
dependent
upon
frequencies
S = "1" (Shifts the display.)
S/C = "1" (Shifts display.)
R/L = "1" (Right shift)
D/L = "1" (8-bit data)
N = "1" (2 lines)
S/C = "0" (Moves the cursor.)
R/L = "0" (Left shift)
DL = "0" (4-bit data)
N = "0" (1 line)
F = "0" (5 ¥ 7 dots)
BF = "0" (Ready to accept
an instruction)
ADD
AAB
ADC
F = "1" (5 ¥ 10 dots)
BF = "1" (Busy)
—
B = "1" (Enables blinking.)
C = "1" (Displyas the corsor.)
D = "1" (Displays a character pattern.)
AS = "1" (Arbitrator Displays arbitrator AS = "0" (Arbitrator Displays
on the upper line) arbitrator on the lower line)
¥: Don't Care
32/54
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