¡ Semiconductor
ML9041
7) CGRAM Address Setting
RS1
1
RS0
0
R/W
DB7
0
DB6
1
DB5
C5
DB4
C4
DB3
C3
DB2
C2
DB1
C1
DB0
C0
0
Instruction code:
ThisinstructionsetsthecharacterdatacorrespondingtotheCGRAMaddressrepresentedbythe
bits C5 to C0 (binary).
The CGRAM addresses are valid until DDRAM or ABRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the CGRAM
address bits C to C set in the instruction code at that time.
5
0
Note:
The execution time of this instruction is 37 ms at an oscillation frequency (OSC) of 270
kHz.
8) DDRAM Address Setting
RS1
1
RS0
0
R/W
DB7
1
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
0
Instruction code:
ThisinstructionsetsthecharacterdatacorrespondingtotheDDRAMaddressrepresentedbythe
bits D6 to D0 (binary).
The DDRAM addresses are valid until CGRAM or ABRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the DDRAM
address bits D6 to D0 set in the instruction code at that time.
In the 1–line mode (the “N” bit is “1”), the DDRAM address represented by bits D6 to D0 (binary)
should be in the range “00” to “4F” in hexadecimal.
In the 2–line mode (the “N” bit is “2”), the DDRAM address represented by bits D6 to D0 (binary)
should be in the range “00” to “27” or “40” to “67” in hexadecimal.
If an address other than above is input, the ML9041 cannot properly write a character code in or
read it from the DDRAM.
Note:
The execution time of this instruction is 37 ms at an oscillation frequency (OSC) of 270
kHz.
9) DDRAM/ABRAM/CGRAM Data Write
RS1
1
RS0
1
R/W
DB7
E7
DB6
E6
DB5
E5
DB4
E4
DB3
E3
DB2
E2
DB1
E1
DB0
E0
0
Instruction code:
This instruction writes data represented by bits E to E (binary) to DDRAM, ABRAM or
7
0
CGRAM.
After data is written, the cursor, blink or display shifts according to the Cursor/Display Shift
instruction (see 5)).
Note:
The execution time of this instruction is 37 ms at an oscillation frequency (OSC) of 270
kHz.
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