PEDL9041A-02
OKI Semiconductor
ML9041A-xxA/xxB
Built-in Reset Circuit
The ML9041A is automatically initialized when the power is turned on.
During initialization, the Busy Flag (BF) is “1” and the ML9041A does not accept any instruction from the CPU
(other than the Read BF instruction).
The Busy Flag is “1” for about 15 ms after the VDD becomes 2.7 V or higher.
During this initialization, the ML9041A performs the following instructions:
1) Display clearing
2) CPU interface data length = 8 bits
3) 1-line LCD display
4) Font size = 5 × 7 dots
5) ADC counting = Increment
6) Display shifting = None
7) Display = Off
8) Cursor = Off
9) Blinking = Off
10) Arbitrator = Displayed in the lower line
11) Setting 1FH (hexadecimal) to the Contrast Data
(DL = “1”)
(N = “0”)
(F = “0”)
(I/D = “1”)
(S = “0”)
(D = “0”)
(C = “0”)
(B = “0”)
(AS = “0”)
To use the built-in reset circuit, the power supply conditions shown below should be satisfied. Otherwise, the
built-in reset circuit may not work properly. In such a case, initialize the ML9041A with the instructions from the
CPU. The use of a battery always requires such initialization from the CPU. (See “Initial Setting of Instructions”)
2.7 V
0.2 V
0.2 V
0.2 V
tON
tOFF
≤
1 ms tOFF
≤
≤
0.1 ms tON 100 ms
Figure 1 Power-on and Power-off Waveform
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