FEDL7033-02
ML7033
1
Semiconductor
MCU Serial Interface
DEN
t2
t5
t10
15
EXCK
1
2
3
4
5
6
13
14
t9
t6
t7
t1
t3
t4
DIO
W
A4
A4
A3
A3
A2
A2
A1
t8
A0
A0
B1
B1
B0
B0
(Write)
t11
DIO
R
A1
(Read)
Figure 5 MCU Serial Interface
SLIC Interface
DEN
15
t20
16
13
14
EXCK
SLIC_I/F *5
E0_n
t21
*5 SLIC_I/F = F2_n pin, F1_n pin, F0_n, SWCn pin, BSELn pin
Figure 6 SLIC Interface 1 (to SLIC)
ALMn
DETn
pin,or
Either
pin or
ALMn, DETn
DEN pin (CR6 and CR13)
t23
t23
t22
INT
INT
ALMn
)
(from
(from
DETn
)
t24
Figure 7 SLIC Interface 2 (from SLIC)
* The INT pin driven to a logic “1” in either of the following cases;
(1) (PDN pin = logic “1”) Any of the ALMn or DETn pins (maximum 4 pins concerned) in a logic “0”
state go to logic “1”.
(2) (PDN pin = logic “0”) All of the ALMn or DETn pins (maximum 4 pins concerned) in a logic “0” state
go to logic “1”.
(3) Both SLIC 1 control (CR6) and SLIC 2 control (CR13) are read by the MCU.
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