■ ML53612 ■ ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
5.8 Transmit Switch Routing Registers, AR = 203fh:2000h (Ch. 63:0)
Note: To ensure compatibility with subsequent versions of this device, write “0” to all "Reserved" bits in the
routing registers. All "Reserved" routing registers read-back "0".
DR_0
[6:0]
7
Definition
Output Time-slot
Reserved (write zero)
Output Time-slot [6:0] (Read/Write)
Selects the CT_D time-slot for transmit channel routing.
00h
01h
02h
•
→
→
→
Time-slot 0 (Default)
Time-slot 1
Time-slot 2
•
•
•
7eh
7fh
→
→
Time-slot 126
Time-slot 127
Note: Internally all time-slots run at 8 Mbps. To transmit on CT_D data streams running at a slower rate, use
the following conversion:
If CT_D data stream is operating at 4 Mbps, transmit switch output time-slot = CT_D time-slot X 2.
If CT_D data stream is operating at 2 Mbps, transmit switch output time-slot = CT_D time-slot X 4.
DR_1
[4:0]
[6:5]
7
Definition
Output Data Stream
Reserved (write zero)
Output Enable
Output Data Stream [4:0] (Read/Write)
Selects the CT_D Data stream for transmit channel routing.
00h
01h
02h
•
→
→
→
CT_D_[0] (Default)
CT_D_[1]
CT_D_[2]
•
•
•
1eh
1fh
→
→
CT_D_[30]
CT_D_[31]
Output Enable (Read/Write)
Controls the Output Enable for the selected CT Bus data stream and time-slot.
0
1
→
→
Output Disabled (Default)
Output Enabled
42
Oki Semiconductor
OKI [ OKI ELECTRONIC COMPONETS ]
