TDA8922C
NXP Semiconductors
2 × 75 W class-D power amplifier
[1] Rs(L) is the series resistance of the low-pass LC filter inductor used in the application.
[2] Output power is measured indirectly; based on RDSon measurement; see Section 13.3.
[3] THD measured between 22 Hz and 20 kHz, using AES17 20 kHz brick wall filter; max. limit is guaranteed but may not be 100 % tested.
[4] Vripple = Vripple(max) = 2 V (p-p); measured independently between VDDPn and SGND and between VSSPn and SGND.
[5] 22 Hz to 20 kHz, using AES17 20 kHz brick wall filter.
[6] 22 Hz to 20 kHz, using AES17 20 kHz brick wall filter.
[7] Po = 1 W; fi = 1 kHz.
[8] Vi = Vi(max) = 1 V (RMS); fi = 1 kHz.
[9] Leads and bond wires included.
12.3 Mono BTL application characteristics
Table 11. Dynamic characteristics
VDD = 25 V; VSS = −25 V; RL = 8 Ω; fi = 1 kHz; fosc = 350 kHz; Rs(L) < 0.1 Ω [1]; Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
[2]
Po
output power
Tj = 85 °C; LLC = 22 µH; CLC = 680 nF
(see Figure 10)
THD = 0.5 %; RL = 8 Ω
THD = 10 %; RL = 8 Ω
Po = 1 W; fi = 1 kHz
-
-
-
-
-
115
155
-
-
W
W
%
%
dB
[3]
[3]
THD
total harmonic distortion
0.02 -
0.05 -
Po = 1 W; fi = 6 kHz
Gv(cl)
closed-loop voltage gain
36
-
SVRR
supply voltage rejection ratio
between pin VDDPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
[4]
[4]
[4]
[4]
-
-
-
-
72
-
-
-
-
dB
dB
dB
dB
64
86
Standby mode; fi = 100 Hz
between pin VSSPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
100
[4]
[4]
[4]
[4]
-
72
72
86
100
63
-
-
-
-
-
dB
dB
dB
dB
kΩ
-
-
Standby mode; fi = 100 Hz
-
Zi
input impedance
measured between one of the input
pins and SGND
45
[5]
[6]
[7]
Vn(o)
output noise voltage
Operating mode; Rs = 0 Ω
Mute mode
-
-
-
-
190
45
-
-
-
-
µV
µV
dB
dB
αmute
mute attenuation
fi = 1 kHz; Vi = 2 V (RMS)
Vi(CM) = 1 V (RMS)
75
CMRR
common mode rejection ratio
75
[1] Rs(L) is the series resistance of the low-pass LC filter inductor used in the application.
[2] Output power is measured indirectly; based on RDSon measurement; see Section 13.3.
[3] THD measured between 22 Hz and 20 kHz, using AES17 20 kHz brick wall filter; max. limit is guaranteed but may not be 100 % tested.
[4] Vripple = Vripple(max) = 2 V (p-p).
[5] 22 Hz to 20 kHz, using an AES17 20 kHz brick wall filter; low noise due to BD modulation.
[6] 22 Hz to 20 kHz, using an AES17 20 kHz brick wall filter.
[7] Vi = Vi(max) = 1 V (RMS); fi = 1 kHz.
TDA8922C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
16 of 40
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