TDA6650TT; TDA6651TT
NXP Semiconductors
5 V mixer/oscillator and low noise PLL synthesizer
Table 22. Characteristics…continued
VCCA = VCCD = 5 V; Tamb = 25 °C; values are given for an asymmetrical IF output loaded with a 75 Ω load or with a
symmetrical IF output loaded with 1.25 kΩ; positive currents are entering the IC and negative currents are going out of the IC;
the performances of the circuits are measured in the measurement circuits Figure 27 and 28 for digital application or in the
measurement circuits Figure 29 and 30 for hybrid application; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ Max
Unit
NF
noise figure, not
see Figure 22
corrected for image
fRF = 443.25 MHz
-
-
6.0
7.0
8.0
9.0
dB
dB
fRF = 863.25 MHz
[5]
[5]
Vo
output voltage causing
1 % cross modulation in
channel
asymmetrical application; see Figure 23
fRF = 443.25 MHz
107
107
110
110
-
-
dBµV
dBµV
fRF = 863.25 MHz
symmetrical application; see Figure 24
fRF = 443.25 MHz
117
117
-
120
120
-
-
dBµV
dBµV
dBµV
fRF = 863.25 MHz
-
[7]
[8]
Vi(lock)
Vf(N+5)−1
Vi
input level without
lock-out
see Figure 26
120
(N + 5) − 1 MHz pulling
fRF(wanted) = 815.25 MHz; fosc = 854.15 MHz;
-
-
80
79
-
-
dBµV
dBµV
fRF(unwanted) = 854.25 MHz
input voltage causing
750 Hz frequency
deviation pulling in
channel
asymmetrical IF output
Zi
input impedance
fRF = 443.25 MHz; see Figure 7
(RS + jLSω)
RS
-
-
35
8
-
-
Ω
LS
nH
fRF = 863.25 MHz; see Figure 7
RS
LS
-
-
36
8
-
-
Ω
nH
Low band oscillator
[9]
fosc
oscillator frequency
83.15
-
-
196.15 MHz
[10]
∆fosc(V)
oscillator frequency shift
with supply voltage
110
-
kHz
[11]
∆fosc(T)
oscillator frequency drift ∆T = 25 °C; VCC = 5 V with compensation
-
900
-
kHz
with temperature
Φosc(dig)
phase noise, carrier to
TDA6650TT/C3/S2; TDA6651TT/C3/S2;
sideband noise in digital TDA6651TT/C3/S3
application
±1 kHz frequency offset; fcomp = 4 MHz;
82
87
95
-
-
dBc/Hz
dBc/Hz
see Figure 8, 27 and 28
±10 kHz frequency offset; worst case in
the frequency range;
100
see Figure 9, 27 and 28
±100 kHz frequency offset; worst case in
the frequency range;
see Figure 10, 27 and 28
104
-
110
117
-
-
dBc/Hz
dBc/Hz
±1.4 MHz frequency offset; worst case in
the frequency range; see Figure 27 and 28
TDA6650TT_6651TT_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 10 January 2007
25 of 54
NXP [ NXP ]
