LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
10.3 Power consumption
Power measurements in Active, sleep, and deep-sleep modes were performed under the
following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
• All peripherals disabled.
Table 14. Static characteristics: Power consumption in active and sleep mode
Tamb = 40 C to +105 C, unless otherwise specified.1.71 V VDD 3.6 V.
Symbol
Active mode
IDD
Parameter
Conditions
Min
Typ[1]
Max
Unit
supply current
CoreMark code executed from
SRAMX:
[2][3][4]
[2][3][4]
[3][4][5]
CCLK = 12 MHz
CCLK = 96 MHz
CCLK = 180 MHz
-
-
-
3.0
-
-
-
mA
mA
mA
16.0
35.0
Sleep mode
[2][3][4]
[2][3][4]
[3][4][5]
IDD
supply current
CCLK = 12 MHz
CCLK = 96 MHz
CCLK = 180 MHz
-
-
-
1.7
4.1
8.3
-
-
-
mA
mA
mA
[1] Typical ratings are not guaranteed. Typical values listed are at room temperature (25 C), 3.3V.
[2] Clock source FRO. PLL disabled.
[3] Characterized through bench measurements using typical samples.
[4] Compiler settings: Keil uVision v.5.23, optimization level 0, optimized for time off.
[5] Clock source FRO. PLL enabled.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
90 of 168
NXP [ NXP ]
