LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
7.16.6 Repetitive Interrupt Timer (RIT)
The repetitive interrupt timer provides a free-running 48-bit counter which is compared to
a selectable value, generating an interrupt when a match occurs. Any bits of the
timer/compare can be masked such that they do not contribute to the match detection.
The repetitive interrupt timer can be used to create an interrupt that repeats at
predetermined intervals.
7.16.6.1 Features
• 48-bit counter running from the main clock. Counter can be free-running or can be
reset when an RIT interrupt is generated.
• 48-bit compare value.
• 48-bit compare mask. An interrupt is generated when the counter value equals the
compare value, after masking. This allows for combinations not possible with a simple
compare.
• Can be used for ETM debug time stamping.
7.17 12-bit Analog-to-Digital Converter (ADC)
The ADC supports a resolution of 12-bit and fast conversion rates of up to 5 Msamples/s.
Sequences of analog-to-digital conversions can be triggered by multiple sources. Possible
trigger sources are the SCTimer/PWM, external pins, and the ARM TXEV interrupt.
The ADC supports a variable clocking scheme with clocking synchronous to the system
clock or independent, asynchronous clocking for high-speed conversions
The ADC includes a hardware threshold compare function with zero-crossing detection.
The threshold crossing interrupt is connected internally to the SCTimer/PWM inputs for
tight timing control between the ADC and the SCTimer/PWM.
7.17.1 Features
• 12-bit successive approximation analog to digital converter.
• Input multiplexing among up to 12 pins.
• Two configurable conversion sequences with independent triggers.
• Optional automatic high/low threshold comparison and “zero crossing” detection.
• Measurement range VREFN to VREFP (typically 3 V; not to exceed VDDA voltage
level).
• 12-bit conversion rate of 5.0 Msamples/s. Options for reduced resolution at higher
conversion rates.
• Burst conversion mode for single or multiple inputs.
• Synchronous or asynchronous operation. Asynchronous operation maximizes
flexibility in choosing the ADC clock frequency, Synchronous mode minimizes trigger
latency and can eliminate uncertainty and jitter in response to a trigger.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
81 of 168
NXP [ NXP ]
