LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
7.20.1.1 Features
• Secure Hash Algorithm (SHA1/SHA2) module with dedicated DMA controller.
• Used with an HMAC to support a challenge/response or to validate a message.
• Can be used to verify external memory that has not been compromised.
7.21 Emulation and debugging
Debug and trace functions are integrated into the ARM Cortex-M4. Serial wire debug and
trace functions are supported. The ARM Cortex-M4 is configured to support up to eight
breakpoints and four watch points.
The ARM SYSREQ reset is supported and causes the processor to reset the peripherals,
execute the boot code, restart from address 0x0000 0000, and break at the user entry
point.
The SWD pins are multiplexed with other digital I/O pins. On reset, the pins assume the
SWD functions by default.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
83 of 168
NXP [ NXP ]
