LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
– 8 inputs
– 10 outputs
– 16 match/capture registers
– 16 events
– 16 states
• PWM capabilities including dead time and emergency abort functions
7.16.3 Windowed WatchDog Timer (WWDT)
The purpose of the watchdog is to reset the controller if software fails to periodically
service it within a programmable time window.
7.16.3.1 Features
• Internally resets chip if not periodically reloaded during the programmable time-out
period.
• Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
• Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
• Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
• Incorrect feed sequence causes reset or interrupt if enabled.
• Flag to indicate watchdog reset.
• Programmable 24-bit timer with internal prescaler.
• Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in
multiples of Tcy(WDCLK) 4.
• The Watchdog Clock (WDCLK) uses the WDOSC as the clock source.
7.16.4 Real Time Clock (RTC) timer
The RTC timer is a 32-bit timer which counts down from a preset value to zero. At zero,
the preset value is reloaded and the counter continues. The RTC timer uses the 32.768
kHz clock input to create a 1 Hz or 1 kHz clock.
7.16.5 Multi-Rate Timer (MRT)
The Multi-Rate Timer (MRT) provides a repetitive interrupt timer with four channels. Each
channel can be programmed with an independent time interval, and each channel
operates independently from the other channels.
7.16.5.1 Features
• 24-bit interrupt timer.
• Four channels independently counting down from individually set values.
• Repeat and one-shot interrupt modes.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
80 of 168
NXP [ NXP ]
