LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
7.9 Memory mapping
The LPC540xx incorporates several distinct memory regions. The APB peripheral area is
512 kB in size and is divided to allow for up to 32 peripherals.Each peripheral is allocated
4 kB of space simplifying the address decoding. The registers incorporated into the CPU,
such as NVIC, SysTick, and sleep mode control, are located on the private peripheral bus.
The ARM Cortex-M4 processor has a single 4 GB address space. The following table
shows how this space is used on the LPC540xx.
Table 7.
Memory usage and details
General Use
Address range
Address range details and description
0x0000 0000 to 0x1FFF FFFF SRAMX
Boot ROM
0x0000 0000 - 0x0002 FFFF I&D SRAM bank (192 kB).
0x0300 0000 - 0x0300 FFFF Boot ROM with API services in a 64 kB
space.
SPI Flash
Interface (SPIFI)
0x1000 0000 - 0x17FF FFFF SPIFI memory mapped access space
(128 MB).
0x2000 0000 to 0x3FFF FFFF Main SRAM
Banks
0x2000 0000 - 0x2002 7FFF SRAM0, SRAM1, SRAM2, SRAM3
banks (Total 160 kB).
SRAM bit band 0x2200 0000 - 0x23FF FFFF SRAM bit band alias addressing
alias addressing
(32 MB).
SRAM Bank
0x4010 0000 0x4010 2000
USB SRAM (8 kB).
0x4000 0000 to 0x7FFF FFFF APB peripherals 0x4000 0000 - 0x4001 FFFF APB slave group 0 up to 32 peripheral
blocks of 4 kB each (128 kB).
0x4002 0000 - 0x4003 FFFF APB slave group 1 up to 32 peripheral
blocks of 4 kB each (128 kB).
0x4004 0000 - 0x4005 FFFF APB asynchronous slave group 2 up to
32 peripheral blocks of 4 kB each
(128 kB).
AHB peripherals 0x4008 0000 - 0x400B FFFF AHB peripherals (256 kB).
Peripheral bit
band alias
0x4200 0000 - 0x43FF FFFF Peripheral bit band alias addressing
(32 MB).
addressing
LPC540xx
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Product data sheet
Rev. 1.8 — 22 June 2018
58 of 168
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