LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
12.2 12-bit ADC characteristics
Table 52. 12-bit ADC static characteristics
amb = 40 C to +105 C; 1.71 V VDD 3.6 V; VSSA = VREFN = GND. ADC calibrated at Tamb = 25C.
T
Symbol
Parameter
Conditions
Min
Typ[2]
Max
Unit
[3]
[4]
VIA
analog input
voltage
0
-
-
VDDA
V
Cia
analog input
capacitance
5.0
-
-
pF
fclk(ADC)
fs
ADC clock
frequency
80
5.3
-
MHz
sampling
frequency
-
-
5.0
3.0
Msamples/s
LSB
[1][5]
[1][5]
ED
differential linearity 2.0 V VDDA 3.6 V
error
2.0 V < VREFP 3.6 V
fclk(ADC) = 80 MHz
1.71 V VDDA 2.0 V
1.71 V VREFP 2.0 V
fclk(ADC) = 80 MHz
-
4.5
-
LSB
[1][5]
[1][6]
-
-
-
-
LSB
LSB
EL(adj)
integral
non-linearity
2.0 V VDDA 3.6 V
2.0 V < VREFP 3.6 V
fclk(ADC) = 80 MHz
4.0
7.5
[1][6]
1.71 V VDDA 2.0 V
1.71 V VREFP 2.0 V
fclk(ADC) = 80 MHz
-
-
LSB
[1][6]
[1][7]
[1][8]
-
-
-
-
-
-
LSB
mV
EO
offset error
calibration enabled
2.2
3.0
Verr(FS)
full-scale error
voltage
2.0 V VDDA 3.6 V
2.0 V < VREFP 3.6 V
fclk(ADC) = 80 MHz
LSB
1.71 V VDDA 2.0 V
1.71 V VREFP 2.0 V
fclk(ADC) = 80 MHz
-
2.5
-
-
LSB
[9][10]
Zi
input impedance
fs = 5.0 Msamples/s
17.0
-
k
[1] Based on characterization; not tested in production.
[2] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
[3] The input resistance of ADC channels 6 to 11 is higher than ADC channels 0 to 5.
[4] Cia represents the external capacitance on the analog input channel for sampling speeds of
5.0 Msamples/s. No parasitic capacitances included.
[5] The differential linearity error (ED) is the difference between the actual step width and the ideal step width.
See Figure 41.
[6] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and
the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 41.
[7] The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the
straight line which fits the ideal curve. See Figure 41.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
138 of 168
NXP [ NXP ]
