NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
7.7.2.1 DEVSTAT - device status register (address 01h)
Table 34.ꢀDEVSTAT - device status register (address 01h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
DSP_ERR
reserved
COMM_ MEMTEMP_ SUPPLY_
TEST
DEVRES
DEVINIT
ERR
ERR
ERR
MODE
Reset
1
reserved
R
0
0
x
0
1
1
Access
R
R
R
R
R
R
R
Table 35.ꢀDEVSTAT - device status register (address 01h) bit description
Bit
Symbol
Description
7
DSP_ERR
The DSP error flag is set if a DSP-specific error is present in the pressure signal DSP:
DSP_ERR = DSP_STAT[PABS_HIGH] | DSP_STAT[PABS_LOW] | DSP_STAT[ST_
INCMPLT] | DSP_STAT[CM_ERROR] | DSP_STAT[ST_ERROR]
5
4
COMM_ERR
The communication error flag is set if any bit in DEVSTAT3 is set:
COMM_ERR = MISO_ERR
MEMTEMP_ERR
The memory error flag is set if any bit in DEVSTAT2 is set:
MEMTEMP_ERR = F_OTP_ERR | U_OTP_ERR | U_RW_ERR | U_W_ACTIVE |
TEMP0_ERR
3
2
SUPPLY_ERR
TESTMODE
The supply error flag is set if any bit in DEVSTAT1 is set:
SUPPLY_ERR = VCCUV_ERR | VCCOV_ER | INTREG_ERR | INTREGA_ERR |
INTREGF_ERR
The test mode bit is set if the device is in test mode. The TESTMODE bit can be cleared by
a test mode operation or by a power cycle.
0 — Test mode is not active
1 — Test mode is active
1
0
DEVRES
DEVINIT
The device reset bit is set following a device reset. This error is cleared by a read of the
DEVSTAT register through any communication interface or on a data transmission that
includes the error in the status field.
0 — Normal operation
1 — Device reset occurred
The device initialization bit is set following a device reset. The bit is cleared once sensor data
is valid for read through one of the device communication interfaces (tPOR_DataValid).
0 — Normal operation
1 — Device initialization in process
7.7.2.2 DEVSTAT1 - device status register (address 02h)
Table 36.ꢀDEVSTAT1 - device status register (address 02h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
VCCUV_
ERR
reserved
VCCOV_
ERR
reserved
INTREGA_
ERR
INTREG_
ERR
INTREGF_ CONT_ERR
ERR
Reset
x
x
x
x
x
x
x
0
Access
R
R
R
R
R
R
R
R
FXPS7115D4
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© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
32 / 72
NXP [ NXP ]
