NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
6.9.3 FLASH configuration register (FCNFG)
Bits 7 through 5 can be read or written at any time. Bits 4 through 0 always read 0 and
cannot be written.
Table 20.ꢀFLASH configuration register (FCNFG) (address $1823)
Bit
R
7
6
KEYACC
0
5
4
3
2
1
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
= Reserved
Table 21.ꢀFCNFG register field descriptions
Field
Description
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to Section 6.8 "Security".
5
0ꢀWrites to 0xFFB0–0xFFB7 are interpreted as the start of a FLASH programming or erase command
1ꢀWrites to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes
KEYACC
6.9.4 FLASH protection register (FPROT and NVPROT)
During reset, the contents of the nonvolatile location NVPROT is copied from FLASH into
FPROT. Bits 0, 1, and 2 are not used and each always reads as 0. This register can be
read at any time, but user program writes have no meaning or effect. Background debug
commands can write to FPROT.
Table 22.ꢀFLASH protection register (FPROT) (address $1824)
Bit
R
7
6
5
4
3
2
1
0
FPS7
FPS6
FPS5
FPS4
FPS3
FPS2
FPS1
FPDIS
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
W
Reset
This register is loaded from nonvolatile location NVPROT during reset.
[1] Background commands can be used to change the contents of these bits in FPROT.
Table 23.ꢀFPROT register field descriptions
Field
Description
FLASH Protect Select Bits — When FPDIS = 0, this 7-bit field determines the ending address of
unprotected FLASH locations at the high address end of the FLASH. Protected FLASH locations cannot be
erased or programmed.
7:1
FPS[7:1]
FLASH Protection Disable
0
0ꢀFLASH block specified by FPS[7:1] is block protected (program and erase not allowed)
1ꢀNo FLASH block is protected
FPDIS
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
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