NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
6.9.6 FLASH command register (FCMD)
Only five command codes are recognized in normal user modes as shown in Table 27.
Refer to Section 6.7.2 "Program and erase times", for a detailed discussion of FLASH
programming and erase operations.
Table 26.ꢀFLASH command register (FCMD) (address $1826)
Bit
R
7
6
5
4
3
2
1
0
0
FCMD7
0
0
FCMD6
0
0
FCMD5
0
0
FCMD4
0
0
FCMD3
0
0
FCMD2
0
0
FCMD1
0
0
FCMD0
0
W
Reset
Table 27.ꢀFLASH commands
Command
FCMD
0x05
0x20
0x25
0x40
0x41
Equate File Label
mBlank
Blank check
Byte program
mByteProg
Byte program — burst mode
Page erase (512 bytes/page)
Mass erase (all FLASH)
mBurstProg
mPageErase
mMassErase
All other command codes are illegal and generate an access error.
It is not necessary to perform a blank check command after a mass erase operation.
Only blank check is required as part of the security unlocking mechanism.
7 Reset, interrupts and system configuration
This section discusses basic reset and interrupt mechanisms and the various sources of
reset and interrupts in the FXTH87E. Some interrupt sources from peripheral modules
are discussed in greater detail within other sections of this product specification. This
section gathers basic information about all reset and interrupt sources in one place for
easy reference. A few reset and interrupt sources, including the computer operating
properly (COP) watchdog and real-time interrupt (RTI), are not part of on-chip peripheral
systems, but are part of the system control logic.
7.1 Features
Reset and interrupt features include:
• Multiple sources of reset for flexible system configuration and reliable operation
• Reset status register (SRS) to indicate source of most recent reset
• Separate interrupt vectors for each module (reduces polling overhead)
7.2 MCU reset
Resetting the MCU provides a way to start processing from a known set of initial
conditions. During reset, most control and status registers are forced to initial values and
the program counter is loaded from the reset vector ($DFFE:$DFFF). On-chip peripheral
FXTH87ERM
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