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A2I09VD015GNR1 参数 Datasheet PDF下载

A2I09VD015GNR1图片预览
型号: A2I09VD015GNR1
PDF下载: 下载PDF文件 查看货源
内容描述: [RF LDMOS Wideband Integrated Power Amplifiers]
分类和应用:
文件页数/大小: 19 页 / 547 K
品牌: NXP [ NXP ]
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Table 9. Load Pull Performance — Maximum Power Tuning  
V
= 48 Vdc, I  
= 8 mA, I = 39 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQ1  
DQ2  
Max Output Power  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
59.5  
59.6  
58.7  
Gain (dB)  
31.6  
(dBm)  
40.2  
(W)  
10  
(MHz)  
920  
940  
960  
51.0 – j3.11  
49.2 + j1.23  
50.9 + j2.55  
65.8 + j7.62  
35.3 + j33.2  
32.5 + j32.9  
29.7 + j32.1  
–2  
–3  
–4  
60.4 + j2.53  
54.2 + j0.33  
31.5  
40.2  
11  
31.3  
40.2  
10  
Max Output Power  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
62.1  
61.5  
61.1  
Gain (dB)  
29.6  
(dBm)  
41.1  
(W)  
13  
(MHz)  
920  
51.0 – j3.11  
66.2 + j7.48  
33.7 + j31.8  
31.3 + j31.1  
28.8 + j30.7  
–3  
–4  
–5  
940  
960  
49.2 + j1.23  
50.9 + j2.55  
60.0 + j2.49  
52.8 + j1.10  
29.5  
41.1  
13  
29.3  
41.0  
13  
(1) Load impedance for optimum P1dB power.  
(2) Load impedance for optimum P3dB power.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Note: Measurement made on a per side basis.  
Table 10. Load Pull Performance — Maximum Efficiency Tuning  
V
= 48 Vdc, I  
= 8 mA, I = 39 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQ1  
DQ2  
Max Drain Efficiency  
P1dB  
(1)  
Z
AM/PM  
()  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
70.0  
68.8  
67.5  
Gain (dB)  
33.7  
(dBm)  
38.5  
(W)  
7
(MHz)  
920  
940  
960  
51.0 – j3.11  
49.2 + j1.23  
50.9 + j2.55  
67.5 + j6.05  
18.5 + j45.3  
14.3 + j44.7  
18.0 + j40.8  
–4  
–5  
–4  
60.9 + j1.05  
54.3 + j0.28  
33.8  
37.5  
6
32.9  
38.8  
8
Max Drain Efficiency  
P3dB  
(2)  
Z
()  
AM/PM  
()  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
71.1  
69.9  
69.4  
Gain (dB)  
31.7  
(dBm)  
39.4  
(W)  
9
(MHz)  
920  
51.0 – j3.11  
67.3 + j4.87  
18.5 + j45.7  
13.0 + j46.5  
18.3 + j40.8  
–3  
–4  
–2  
940  
960  
49.2 + j1.23  
50.9 + j2.55  
59.2 – j0.18  
53.5 – j0.45  
32.0  
38.1  
6
30.9  
39.8  
10  
(1) Load impedance for optimum P1dB efficiency.  
(2) Load impedance for optimum P3dB efficiency.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Note: Measurement made on a per side basis.  
Input Load Pull  
Tuner and Test  
Circuit  
Output Load Pull  
Tuner and Test  
Circuit  
Device  
Under  
Test  
Z
Z
in  
Z
load  
source  
A2I09VD015NR1 A2I09VD015GNR1  
RF Device Data  
NXP Semiconductors  
9
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