M58LT256JST, M58LT256JSB
Common Flash interface
Value
Table 40. Protection register information
Offset Data
Description
Number of protection register fields in JEDEC ID space.
0000h indicates that 256 fields are available.
(P+E)h = 118h 0002h
2
(P+F)h = 119h 0080h Protection Field 1: Protection Description
80h
00h
8 Bytes
8 Bytes
89h
00h
00h
00h
0
Bits 0-7 Lower byte of protection register address
(P+10)h = 11Ah 0000h
Bits 8-15 Upper byte of protection register address
(P+ 11)h = 11Bh 0003h
Bits 16-23 2n bytes in factory pre-programmed region
Bits 24-31 2n bytes in user programmable region
(P+12)h = 11Ch 0003h
(P+13)h = 11Dh 0089h
Protection Register 2: Protection Description
(P+14)h = 11Eh 0000h
Bits 0-31 protection register address
(P+15)h = 11Fh 0000h
(P+16)h = 120h 0000h
(P+17)h = 121h 0000h
(P+18)h = 122h 0000h
(P+19)h = 123h 0000h
(P+1A)h = 124h 0010h
(P+1B)h = 125h 0000h
(P+1C)h = 126h 0004h
Bits 32-39 n number of factory programmed regions (lower
byte)
Bits 40-47 n number of factory programmed regions (upper
byte)
Bits 48-55 2n bytes in factory programmable region
0
Bits 56-63 n number of user programmable regions (lower
byte)
0
16
Bits 64-71 n number of user programmable regions (upper
byte)
Bits 72-79 2n bytes in user programmable region
0
16
83/108
NUMONYX [ NUMONYX B.V ]
