DC and AC parameters
Figure 14. Clock input AC waveform
M58LT256JST, M58LT256JSB
tKHKL
tKHKH
tr
tf
tKLKH
AI06981
(1) (2)
Table 23. Synchronous read AC characteristics
M58LT256JST/B
Symbol
Alt
Parameter
Unit
85
tAVKH
tELKH
tAVCLKH
tELCLKH
Address Valid to Clock High
Min
Min
9
9
ns
ns
Chip Enable Low to Clock High
Chip Enable Pulse Width
(subsequent synchronous reads)
tEHEL
Min
20
ns
tEHTZ
tKHAX
tKHQV
tKHTV
tKHQX
tKHTX
tLLKH
tKHKH
tKHKL
tKLKH
Chip Enable High to Wait Hi-Z
Clock High to Address Transition
Max
Min
17
10
ns
ns
tCLKHAX
tCLKHQV
Clock High to Output Valid
Clock High to WAIT Valid
Max
Min
17
3
ns
ns
Clock High to Output Transition
Clock High to WAIT Transition
tCLKHQX
tADVLCLKH Latch Enable Low to Clock High
Min
Min
9
ns
ns
tCLK
Clock Period (f=52 MHz)
19
Clock High to Clock Low
Clock Low to Clock High
Min
6
2
ns
ns
tf
Clock Fall or Rise Time
Max
tr
1. Sampled only, not 100% tested.
2. For other timings please refer to Table 22: Asynchronous read AC characteristics.
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