DC and AC parameters
M58LT256JST, M58LT256JSB
Table 22. Asynchronous read AC characteristics
M58LT256JST/B
Symbol
Alt
Parameter
Unit
85
tAVAV
tAVQV
tAVQV1
tRC
tACC
tPAGE
tOH
Address Valid to Next Address Valid
Address Valid to Output Valid (Random)
Address Valid to Output Valid (Page)
Address Transition to Output Transition
Chip Enable Low to Wait Valid
Min
Max
Max
Min
Max
Max
Min
Max
Min
Max
Max
Min
Max
Min
Max
Max
Min
Min
Min
Min
85
85
25
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1)
tAXQX
tELTV
25
85
0
(2)
tELQV
tCE
tLZ
Chip Enable Low to Output Valid
Chip Enable Low to Output Transition
Chip Enable High to Wait Hi-Z
(1)
tELQX
tEHTZ
17
0
(1)
tEHQX
tEHQZ
tGLQV
tGLQX
tOH
tHZ
tOE
tOLZ
Chip Enable High to Output Transition
Chip Enable High to Output Hi-Z
Output Enable Low to Output Valid
Output Enable Low to Output Transition
Output Enable Low to Wait Valid
Output Enable High to Output Transition
Output Enable High to Output Hi-Z
Output Enable High to Wait Hi-Z
(1)
(2)
(1)
17
25
0
tGLTV
17
0
(1)
tGHQX
tOH
tDF
(1)
tGHQZ
17
17
10
10
9
tGHTZ
tAVLH
tELLH
tLHAX
tAVADVH Address Valid to Latch Enable High
tELADVH Chip Enable Low to Latch Enable High
tADVHAX Latch Enable High to Address Transition
tLLLH tADVLADVH Latch Enable Pulse Width
Latch Enable Low to Output Valid
10
tLLQV
tADVLQV
Max
85
ns
(Random)
1. Sampled only, not 100% tested.
2. G may be delayed by up to tELQV - tGLQV after the falling edge of E without increasing tELQV
.
60/108