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M58LT128HSB8ZA6E 参数 Datasheet PDF下载

M58LT128HSB8ZA6E图片预览
型号: M58LT128HSB8ZA6E
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位(8 MB 】 16 ,多银行,多接口,突发) 1.8 V电源供电,安全闪存 [128 Mbit (8 Mb 】16, multiple bank, multilevel interface, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 110 页 / 2025 K
品牌: NUMONYX [ NUMONYX B.V ]
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M58LT128HST, M58LT128HSB  
Status Register  
5.6  
Program Suspend status bit (SR2)  
The Program Suspend status bit indicates that a Program operation has been suspended.  
The Program Suspend status bit should only be considered valid when the Program/Erase  
Controller status bit is High (Program/Erase Controller inactive).  
When the Program Suspend status bit is High (set to ‘1’), a Program/Erase Suspend  
command has been issued and the memory is waiting for a Program/Erase Resume  
command.  
SR2 is set within the Program Suspend latency time of the Program/Erase Suspend  
command being issued; therefore,the memory may still complete the operation rather than  
entering Suspend mode.  
When a Program/Erase Resume command is issued, the Program Suspend status bit  
returns Low.  
5.7  
5.8  
Block Protection status bit (SR1)  
The Block Protection status bit is used to identify if a Program or Block Erase operation has  
tried to modify the contents of a protected block.  
When the Block Protection status bit is High (set to ‘1’), a Program or Erase operation has  
been attempted on a protected block.  
Once set High, the Block Protection status bit must be set Low by a Clear Status Register  
command or a hardware reset before a new Program or Erase command is issued,  
otherwise the new command appears to fail.  
Bank Write/Multiple Word Program status bit (SR0)  
The Bank Write status bit indicates whether the addressed bank is programming or erasing.  
In Buffer Enhanced Factory Program mode the Multiple Word Program bit shows if the  
device is ready to accept a new word to be programmed to the memory array.  
The Bank Write status bit should only be considered valid when the Program/Erase  
Controller Status SR7 is Low (set to ‘0’).  
When both the Program/Erase Controller status bit and the Bank Write status bit are Low  
(set to ‘0’), the addressed bank is executing a Program or Erase operation. When the  
Program/Erase Controller status bit is Low (set to ‘0’) and the Bank Write status bit is High  
(set to ‘1’), a program or erase operation is being executed in a bank other than the one  
being addressed.  
In Buffer Enhanced Factory Program mode, if Multiple Word Program status bit is Low (set  
to ‘0’), the device is ready for the next word. If the Multiple Word Program status bit is High  
(set to ‘1’), the device is not ready for the next word.  
For further details on how to use the Status Register, see the Flowcharts and Pseudocodes  
provided in Appendix C.  
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