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M58LT128HSB8ZA6E 参数 Datasheet PDF下载

M58LT128HSB8ZA6E图片预览
型号: M58LT128HSB8ZA6E
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位(8 MB 】 16 ,多银行,多接口,突发) 1.8 V电源供电,安全闪存 [128 Mbit (8 Mb 】16, multiple bank, multilevel interface, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 110 页 / 2025 K
品牌: NUMONYX [ NUMONYX B.V ]
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Status Register  
M58LT128HST, M58LT128HSB  
5.3  
Erase/Blank Check status bit (SR5)  
The Erase/Blank Check status bit is used to identify if there was an error during a Block  
Erase operation. When the Erase/Blank Check status bit is High (set to ‘1’), the  
Program/Erase Controller has applied the maximum number of pulses to the block and still  
failed to verify that it has erased correctly.  
The Erase/Blank Check status bit should be read once the Program/Erase Controller status  
bit is High (Program/Erase Controller inactive).  
The Erase/Blank Check status bit is also used to indicate whether an error occurred during  
the Blank Check operation. If the data at one or more locations in the block where the Blank  
Check command has been issued is different from FFFFh, SR5 is set to '1'.  
Once set High, the Erase/Blank Check status bit must be set Low by a Clear Status Register  
command or a hardware reset before a new erase command is issued, otherwise the new  
command appears to fail.  
5.4  
Program status bit (SR4)  
The Program status bit is used to identify if there was an error during a Program operation.  
The Program status bit should be read once the Program/Erase Controller status bit is High  
(Program/Erase Controller inactive).  
When the Program status bit is High (set to ‘1’), the Program/Erase Controller has applied  
the maximum number of pulses to the word and still failed to verify that it has programmed  
correctly. Attempting to program a '1' to an already programmed bit while V = V  
also  
PP  
PPH  
sets the Program status bit High. If V is different from V  
, SR4 remains Low (set to '0')  
PP  
PPH  
and the attempt is not shown.  
Once set High, the Program status bit must be set Low by a Clear Status Register command  
or a hardware reset before a new Program command is issued, otherwise the new  
command appears to fail.  
5.5  
VPP status bit (SR3)  
The V status bit is used to identify an invalid voltage on the V pin during Program and  
PP  
PP  
Erase operations. The V pin is only sampled at the beginning of a Program or Erase  
PP  
operation. Program and Erase operations are not guaranteed if V becomes invalid during  
PP  
an operation.  
When the V status bit is Low (set to ‘0’), the voltage on the V pin was sampled at a valid  
PP  
PP  
voltage.  
When the V status bit is High (set to ‘1’), the V pin has a voltage that is below the V  
PP  
PP  
PP  
Lockout Voltage, V  
. This means the memory is protected and Program and Erase  
PPLK  
operations cannot be performed.  
Once set High, the V status bit must be set Low by a Clear Status Register command or a  
PP  
hardware reset before a new Program or Erase command is issued, otherwise the new  
command appears to fail.  
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