Status Register
M29W400DT, M29W400DB
(1)
Table 7.
Status Register bits (continued)
Operation
Address
DQ7
DQ6
DQ5
DQ3
DQ2
RB
Erasing block
0
Toggle
0
0
Toggle
0
Block Erase
before timeout
Non-erasing
block
No
Toggle
0
0
0
Toggle
Toggle
Toggle
0
0
0
0
1
1
0
0
0
Erasing block
Toggle
Block Erase
Non-erasing
block
No
Toggle
No
Toggle
Erasing block
1
0
–
Toggle
1
1
0
0
Erase Suspend
Non-erasing
block
Data read as normal
Good block
address
No
Toggle
0
0
Toggle
Toggle
1
1
1
1
Erase Error
Faulty block
address
Toggle
1. Unspecified data bits should be ignored.
Figure 7.
Data polling flowchart
START
READ DQ5 & DQ7
at VALID ADDRESS
DQ7
=
YES
DATA
NO
NO
DQ5
= 1
YES
READ DQ7
at VALID ADDRESS
DQ7
=
YES
DATA
NO
FAIL
PASS
AI03598
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NUMONYX [ NUMONYX B.V ]
