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M25PE80-VMN6P 参数 Datasheet PDF下载

M25PE80-VMN6P图片预览
型号: M25PE80-VMN6P
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存内存集成电路
文件页数/大小: 66 页 / 1387 K
品牌: NUMONYX [ NUMONYX B.V ]
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Instructions  
M25PE80  
(1)  
Table 11. Not for new design: lock registers for the M25PE80 in T7Y process  
Bit  
Bit name  
Value  
Function  
b7-b4  
Reserved  
This functionality must not be used for new designs, as the  
M25PE80 delivered from Feb 2007 will not offer this functionality.  
‘1’ The write lock and lock down bits cannot be changed. Once a ‘1’  
is written to the lock down bit it cannot be cleared to ‘0’ except by  
a reset or power-up.  
Subsector lock  
down(2)  
b3  
This functionality must not be used for new designs, as the  
M25PE80 delivered from Feb 2007 will not offer this functionality.  
The write lock and lock down bits can be changed by writing new  
‘0’  
values to them (default value).  
This functionality must not be used for new designs, as the  
M25PE80 delivered from Feb 2007 will not offer this functionality.  
Write, program and erase operations in this subsector will not be  
‘1’  
executed. The memory contents will not be changed.  
Subsector write  
lock(2)  
b2  
This functionality must not be used for new designs, as the  
M25PE80 delivered from Feb 2007 will not offer this functionality.  
Write, program and erase operations in this subsector are  
‘0’  
executed and will modify the subsector contents (default value).  
The write lock and lock down bits cannot be changed. Once a ‘1’  
‘1’ is written to the lock down bit it cannot be cleared to ‘0’, except by  
a reset or power-up.  
b1  
b0  
Sector lock down  
Sector write lock  
The write lock and lock down bits can be changed by writing new  
values to them (default value).  
‘0’  
Write, program and erase operations in this sector will not be  
executed. The memory contents will not be changed.  
‘1’  
Write, program and erase operations in this sector are executed  
and will modify the sector contents (default value).  
‘0’  
1. See: Important note on page 6.  
2. Valid only for sector 0 and sector 15 (the value ‘0’ is returned for other sectors).  
Figure 14. Read lock register (RDLR) instruction sequence and data-out sequence  
S
0
1
2
3
4
5
6
7
8
9
10  
28 29 30 31 32 33 34 35 36 37 38 39  
C
Instruction  
24-bit address  
23 22 21  
MSB  
3
2
1
0
D
Q
Lock register out  
High Impedance  
2
7
6
5
4
3
1
0
MSB  
AI10783  
32/66  
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