欢迎访问ic37.com |
会员登录 免费注册
发布采购

M25PE80-VMN6P 参数 Datasheet PDF下载

M25PE80-VMN6P图片预览
型号: M25PE80-VMN6P
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位,页擦除串行闪存与字节变性, 75兆赫的SPI总线,标准引脚 [8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout]
分类和应用: 闪存内存集成电路
文件页数/大小: 66 页 / 1387 K
品牌: NUMONYX [ NUMONYX B.V ]
 浏览型号M25PE80-VMN6P的Datasheet PDF文件第26页浏览型号M25PE80-VMN6P的Datasheet PDF文件第27页浏览型号M25PE80-VMN6P的Datasheet PDF文件第28页浏览型号M25PE80-VMN6P的Datasheet PDF文件第29页浏览型号M25PE80-VMN6P的Datasheet PDF文件第31页浏览型号M25PE80-VMN6P的Datasheet PDF文件第32页浏览型号M25PE80-VMN6P的Datasheet PDF文件第33页浏览型号M25PE80-VMN6P的Datasheet PDF文件第34页  
Instructions  
M25PE80  
6.7  
Read data bytes at higher speed (FAST_READ)  
The device is first selected by driving Chip Select (S) Low. The instruction code for the read  
data bytes at higher speed (FAST_READ) instruction is followed by a 3-byte address (A23-  
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).  
Then the memory contents, at that address, is shifted out on serial data output (Q), each bit  
being shifted out, at a maximum frequency f , during the falling edge of Serial Clock (C).  
C
The instruction sequence is shown in Figure 13.  
The first byte addressed can be at any location. The address is automatically incremented  
to the next higher address after each byte of data is shifted out. The whole memory can,  
therefore, be read with a single read data bytes at higher speed (FAST_READ) instruction.  
When the highest address is reached, the address counter rolls over to 000000h, allowing  
the read sequence to be continued indefinitely.  
The read data bytes at higher speed (FAST_READ) instruction is terminated by driving Chip  
Select (S) High. Chip Select (S) can be driven High at any time during data output. Any read  
data bytes at higher speed (FAST_READ) instruction, while an erase, program or write cycle  
is in progress, is rejected without having any effects on the cycle that is in progress.  
Figure 13. Read data bytes at higher speed (FAST_READ) instruction sequence  
and data-out sequence  
S
0
1
2
3
4
5
6
7
8
9
10  
28 29 30 31  
C
Instruction  
24-bit address  
23 22 21  
3
2
1
0
D
Q
High Impedance  
S
C
47  
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46  
Dummy byte  
7
6
5
4
3
2
0
1
D
Q
DATA OUT 2  
DATA OUT 1  
7
6
5
4
3
2
1
0
7
7
6
5
4
3
2
0
1
MSB  
MSB  
MSB  
AI04006  
1. Address bits A23 to A20 are don’t care.  
30/66  
 复制成功!