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M25P10-AVMN6TP/Y 参数 Datasheet PDF下载

M25P10-AVMN6TP/Y图片预览
型号: M25P10-AVMN6TP/Y
PDF下载: 下载PDF文件 查看货源
内容描述: 1兆位,串行闪存, 50MHz的SPI总线接口 [1 Mbit, serial Flash memory, 50 MHz SPI bus interface]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 51 页 / 989 K
品牌: NUMONYX [ NUMONYX B.V ]
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M25P10-A
Revision history
13
Revision history
Table 25.
Date
25-Feb-2001
12-Sep-2002
Document revision history
Revision
1.0
1.1
Document written.
VFQFPN8 package (MLP8) added. Clarification of descriptions of
entering Standby Power mode from Deep Power-down mode, and of
terminating an instruction sequence or data-out sequence.
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after.
Erroneous address ranges corrected in memory organization table.
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
40 MHz AC characteristics table included as well as 25 MHz. I
CC3
(max),
t
SE
(typ) and t
BE
(typ) values improved. Change of naming for VDFPN8
package.
Devices with Process technology Code X added (Read
and
added.
SO8 narrow package specifications updated.
Notes 1 and 2 removed from
Note 1 to
changed, note 2 removed
and T
LEAD
values removed.
Small text changes. End timing line of t
SHQZ
modified in
and
instructions,
and
paragraph clarified.
Updated Page Program (PP) instructions in
and
All packages are ECOPACK® compliant. Grade 3 information added (see
and
modified and
Note 2 added.
added.
40MHz frequency condition modified for I
CC3
in
shows preliminary data.
MLP package renamed as VFQFPN and specifications updated (see
silhouette on first page,
and
added below
and
Note 2
added below
V
WI
parameter for device
grade 3 added to
/X
Process
added to
Changes
13-Dec-2002
1.2
21-Feb-2003
1.3
24-Nov-2003
2.0
08-Mar-2005
3.0
01-Apr-2005
4.0
01-Aug-2005
5.0
14-Apr-2006
6
49/51