DP83816
3.0 Functional Description
(Continued)
The LED100N pin indicates a good link at 100 Mb/s data
rate. The standard CMOS driver goes low when this
occurs. In 100BASE-T mode, link is established as a result
of input receive amplitude compliant with TP-PMD
3.4.4 Auto-Negotiation Restart
specifications which will result in internal generation of
Once Auto-Negotiation has completed, it may be restarted signal detect. This signal will assert after the internal Signal
at any time by setting bit 9 (Restart Auto-Negotiation) of the Detect has remained asserted for a minimum of 500 us.
BMCR to one. If the mode configured by a successful Auto- The signal will de-assert immediately following the de-
Negotiation loses a valid link, then the Auto-Negotiation assertion of the internal signal detect.
process will resume and attempt to determine the
configuration for the link. This function ensures that a valid The LED10N pin indicates a good link at 10 Mb/s data rate.
configuration is maintained if the cable becomes The standard CMOS driver goes low when this occurs. 10
Mb/s Link is established as a result of the reception of at
disconnected.
least seven consecutive normal Link Pulses or the
A renegotiation request from any entity, such as a reception of a valid 10BASE-T packet. This will cause the
management agent, will cause the DP83816 to halt any assertion of this signal. the signal will de-assert in
transmit data and link pulse activity until the accordance with the Link Loss Timer as specified in IEEE
break_link_timer expires (~1500 ms). Consequently, the 802.3.
Link Partner will go into link fail and normal Auto-
Negotiation resumes. The DP83816 will resume Auto- The DP83816 LED pins are capable of 6 mA. Connection
Negotiation after the break_link_timer has expired by of these LED pins should ensure this is not overloaded.
Using 2 mA LED devices the connection for the LEDs
issuing FLP (Fast Link Pulse) bursts.
could be as shown in Figure 3-5.
3.4.5 Enabling Auto-Negotiation via Software
mode, and any condition other than a single good link
occurs, then the parallel detect fault bit will set to a one, bit
4 of the ANER register (98h).
It is important to note that if the DP83816 has been
initialized upon power-up as a non-auto-negotiating device
(forced technology), and it is then required that Auto-
Negotiation or re-Auto-Negotiation be initiated via software,
bit 12 (Auto-Negotiation Enable) of the Basic Mode Control
Register must first be cleared and then set for any Auto-
Negotiation function to take effect.
3.4.6 Auto-Negotiation Complete Time
Parallel detection and Auto-Negotiation take approximately
2-3 seconds to complete. In addition, Auto-Negotiation with
next page should take approximately 2-3 seconds to
complete, depending on the number of next pages sent.
Refer to Clause 28 of the IEEE 802.3u standard for a full
description of the individual timers related to Auto-
Negotiation.
LEDACTN
453
Ω
453
Ω
LED100N
453
Ω
V
DD
3.5 LED Interfaces
The DP83816 has parallel outputs to indicate the status of
Activity (Transmit or Receive), 100 Mb/s Link, and 10 Mb/s
Link.
The LEDACTN pin indicates the presence of transmit or
receive activity. The standard CMOS driver goes low when
RX or TX activity is detected in either 10 Mb/s or 100 Mb/s
operation.
Figure 3-5 LED Loading Example
17
LED10N
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