Timing Diagrams (All timing is measured from the 50% voltage points) (Continued)
Output Enable and Reset with INTR
DS005671-52
Note: Read strobe must occur 8 clock periods (8/f ) after assertion of interrupt to guarantee reset of INTR .
CLK
Typical Applications
6800 Interface
Ratiometeric with Full-Scale Adjust
DS005671-53
DS005671-54
Note: before using caps at V or V
/2,
see section 2.3.2 Input Bypass Capacitors.
IN REF
7
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