7.0 Electrical Specifications
This section provides information on electrical connec-
tions, absolute maximum ratings, required operating con-
ditions, DC characteristics, and AC characteristics for the
Geode GXm processor. All voltage values in the Electrical
Specifications are with respect to VSS unless otherwise
noted. For detailed information on the PCI bus electrical
specification refer to Chapter 4 of the PCI Bus Specifica-
tion, Revision 2.1.
7.2.2 Power Sequencing
the Core and I/O Voltages
With two voltages connected to the GXm processor, it is
important that the voltages come up in the correct order.
VCC2 should come up at or before VCC3. There are no
additional timing requirements related to this sequence.
7.2.3 NC-Designated Pins
Pins designated NC (No Connection) should be left dis-
connected. Connecting an NC pin to a pull-up/-down
resistor, or an active signal could cause unexpected
results and possible circuit malfunctions.
7.1 PART NUMBERS
The following part numbers designate the various speeds
available. For all speeds, the VCC2 voltage is 2.9V nominal
and the VCC3 voltage is 3.3V nominal.
7.2.4 Pull-Up and Pull-Down Resistors
Table 7-2 lists the input pins that are internally connected
to a 20-kohm pull-up/-down resistor. When unused, these
inputs do not require connection to an external pull-up/-
down resistor.
Table 7-1. Part Numbers
Core
Frequency Temperature
(MHz)
(Degree C)
Part Marking
Table 7-2. Pins with 20-kohm Internal Resistor
266
70
85
70
85
70
85
70
85
70
85
70
85
70
85
70
85
GXm-266P 2.9V 70C
GXm-266P 2.9V 85C
GXm-266B 2.9V 70C
GXm-266B 2.9V 85C
GXm-233P 2.9V 70C
GXm-233P 2.9V 85C
GXm-233B 2.9V 70C
GXm-233B 2.9V 85C
GXm-200P 2.9V 70C
GXm-200P 2.9V 85C
GXm-200B 2.9V 70C
GXm-200B 2.9V 85C
GXm-180P 2.9V 70C
GXm-180P 2.9V 85C
GXm-180B 2.9V 70C
GXm-180B 2.9V 85C
BGA
Ball No.
SPGA
Pin No.
Signal Name
PU/PD
Pull-up
SUSP#*
FRAME#
IRDY#
H2
A8
M4
C13
D14
B14
A15
B16
E15
D16
A17
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
233
200
180
C9
TRDY#
B9
STOP#
C11
B11
A9
LOCK#
DEVSEL#
PERR#
SERR#
REQ[2:0]#
A11
C12
D3,
H3,
E3
E3,
K2,
E1
TCLK
TMS
TDI
J2
H1
D2
F3
P4
N3
F4
J5
Pull-up
Pull-up
Pull-up
Note: B = BGA Package
P = SPGA Package
TEST
Pull-down
Note: *SUSP# is pulled up when not active.
7.2 ELECTRICAL CONNECTIONS
7.2.5 Unused Input Pins
All inputs not used by the system designer and not listed
in Table 7-2 should be kept at either ground or VCC3. To
prevent possible spurious operation, connect active-high
inputs to ground through a 20-kohm (±10%) pull-down
resistor and active-low inputs to VCC3 through a 20-kohm
(±10%) pull-up resistor.
7.2.1 Power/Ground Connections and Decoupling
Testing and operating the GXm processor requires the
use of standard high frequency techniques to reduce par-
asitic effects. These effects can be minimized by filtering
the DC power leads with low-inductance decoupling
capacitors, using low-impedance wiring, and by utilizing
all of the VCC2, VCC3, and VSS pins.
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