Power Management (Continued)
6.5.4 Stopping the Input Clock
The CPU remains suspended until SYSCLK is restarted
and the Suspend mode is exited as described earlier.
While SYSCLK is stopped, the processor can no longer
sample and respond to any input stimulus including
REQx#, NMI, SMI#, INTR, and RESET inputs.
Because the GXm processor is a static device, the input
clock (SYSCLK) can be stopped and restarted without
any loss of internal CPU data. If DRAMS are used that do
not have self-refresh, bit 0 of the PM Clock Stop Control
Register must be set to a one and the CLK32KHZ input
must be continuously applied to keep the refresh circuitry
running. The SYSCLK input can be stopped at either a
logic high or logic low state. The required sequence for
stopping SYSCLK is to initiate CPU Suspend mode, wait
for the assertion of SUSPA# by the processor, and then
stop the input clock.
Figure 6-4 illustrates the recommended sequence for
stopping the SYSCLK using SUSP# to initiate Suspend
mode. SYSCLK may be started prior to or following nega-
tion of the SUSP# input. The figure includes the
SUSP_3V pin from the CS5530 which is used to stop the
external clocks.
SYSCLK
SUSP#
SUSPA#
SUSP_3V
(CS5530)
SMI Event, Timer or Pin
Figure 6-4. Stopping SYSCLK During Suspend Mode
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