Instruction Set (Continued)
9.1.4 reg Field
Table 9-10. General Registers Selected
by reg Field
The reg field (Table 9-10) determines which general regis-
ters are to be used. The selected register is dependent on
whether a 16- or 32-bit operation is current and on the sta-
tus of the w bit.
16-Bit Operation
32-Bit Operation
reg
w = 0
w = 1
w = 0
w = 1
000
001
010
011
100
101
110
111
AL
CL
DL
BL
AX
CX
DX
BX
SP
BP
SI
AL
CL
DL
BL
AH
CH
DH
BH
EAX
ECX
EDX
EBX
ESP
EBP
ESI
9.1.4.1 sreg2 Field (ES, CS, SS, DS Register
Selection)
The sreg2 field (Table 9-11) is a 2-bit field that allows one
of the four 286-type segment registers to be specified.
AH
CH
DH
BH
9.1.4.2 sreg3 Field (FS and GS Segment Register
Selection)
The sreg3 field (Table 9-12) is 3-bit field that is similar to
the sreg2 field, but allows use of the FS and GS segment
registers.
DI
EDI
Table 9-11. sreg2 Field Encoding
sreg2 Field
Segment Register Selected
00
01
10
11
ES
CS
SS
DS
Table 9-12. sreg3 Field Encoding
sreg3 Field
Segment Register Selected
000
001
010
011
100
101
110
111
ES
CS
SS
DS
FS
GS
Undefined
Undefined
www.national.com
206
Revision 3.1
NSC [ National Semiconductor ]
