Instruction Set (Continued)
9.1.3 mod and r/m Byte (Memory Addressing)
Table 9-9. mod r/m Field Encoding
The mod and r/m fields within the mod r/m byte, select the
type of memory addressing to be used. Some instructions
use a fixed addressing mode (e.g., PUSH or POP) and
therefore, these fields are not present. Table 9-8 lists the
addressing method when 16-bit addressing is used and a
mod r/m byte is present. Some mod r/m field encodings
are dependent on the w field and are shown in Table 9-8.
32-Bit Address
16-Bit Address
Mode with
mod r/m Byte
Mode with mod r/m
Byte and No s-i-b
Byte Present
mod
Field
r/m
Field
00
00
00
00
00
000
001
010
011
100
DS:[BX+SI]
DS:[BX+DI]
SS:[BP+SI]
SS:[BP+DI]
DS:[SI]
DS:[EAX]
DS:[ECX]
DS:[EDX]
DS:[EBX]
Table 9-8. General Registers Selected by mod
r/m Fields and w Field
s-i-b is present
(See Table 9-15)
16-Bit
Operation
32-Bit
Operation
00
00
00
101
110
111
DS:[DI]
DS:[d32]
DS:[ESI]
DS:[EDI]
DS:[d16]
DS:[BX]
mod
r/m
w = 0
w = 1
w = 0
w = 1
11
11
11
11
11
11
11
11
000
001
010
011
100
101
110
111
AL
CL
DL
BL
AX
CX
DX
BX
SP
BP
SI
AL
CL
DL
BL
AH
CH
DH
BH
EAX
ECX
EDX
EBX
ESP
EBP
ESI
01
01
01
01
01
000
001
010
011
100
DS:[BX+SI+d8]
DS:[BX+DI+d8]
SS:[BP+SI+d8]
SS:[BP+DI+d8]
DS:[SI+d8]
DS:[EAX+d8]
DS:[ECX+d8]
DS:[EDX+d8]
DS:[EBX+d8]
AH
CH
DH
BH
s-i-b is present
(See Table 9-15)
01
01
01
101
110
111
DS:[DI+d8]
SS:[BP+d8]
DS:[BX+d8]
SS:[EBP+d8]
DS:[ESI+d8]
DS:[EDI+d8]
DI
EDI
10
10
10
10
10
000
001
010
011
100
DS:[BX+SI+d16]
DS:[BX+DI+d16]
SS:[BP+SI+d16]
SS:[BP+DI+d16]
DS:[SI+d16]
DS:[EAX+d32]
DS:[ECX+d32]
DS:[EDX+d32]
DS:[EBX+d32]
s-i-b is present
(See Table 9-15)
10
10
10
101
110
111
DS:[DI+d16]
SS:[BP+d16]
DS:[BX+d16]
SS:[EBP+d32]
DS:[ESI+d32]
DS:[EDI+d32]
11
xxx
See Table 9-8.
See Table 9-8
Note: Note: d8 refers to 8-bit displacement, and d16 refers to
16-bit displacement.
Revision 3.1
205
www.national.com
NSC [ National Semiconductor ]
