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30140-23 参数 Datasheet PDF下载

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型号: 30140-23
PDF下载: 下载PDF文件 查看货源
内容描述: 的Geode ™ GXM处理器与MMX支持集成的x86解决方案 [Geode⑩ GXm Processor Integrated x86 Solution with MMX Support]
分类和应用: 微控制器和处理器外围集成电路微处理器
文件页数/大小: 244 页 / 4221 K
品牌: NSC [ National Semiconductor ]
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Instruction Set (Continued)  
9.1.1 Prefix (Optional)  
Table 9-3. Instruction Prefix Summary  
Prefix bytes can be placed in front of any instruction to  
modify the operation of that instruction. When more than  
one prefix is used, the order is not important. There are  
five types of prefixes that can be used:  
Prefix  
Encoding Description  
ES:  
CS:  
SS:  
DS:  
FS:  
GS:  
26h  
2Eh  
36h  
3Eh  
64h  
65h  
66h  
67h  
Override segment default, use ES  
for memory operand.  
Override segment default, use CS  
for memory operand.  
1. Segment Override explicitly specifies which segment  
register the instruction will use for effective address  
calculation.  
Override segment default, use SS  
for memory operand.  
2. Address Size switches between 16-bit and 32-bit  
addressing by selecting the non-default address size.  
Override segment default, use DS  
for memory operand.  
Override segment default, use FS  
for memory operand.  
3. Operand Size switches between 16-bit and 32-bit  
operand size by selecting the non-default operand  
size.  
Override segment default, use GS  
for memory operand.  
4. Repeat is used with a string instruction to cause the  
instruction to be repeated for each element of the  
string.  
Operand  
Size  
Make operand size attribute the  
inverse of the default.  
Address  
Size  
Make address size attribute the  
inverse of the default.  
5. Lock is used to assert the hardware LOCK# signal  
during execution of the instruction.  
LOCK  
F0h  
F2h  
Assert LOCK# hardware signal.  
REPNE  
Repeat the following string  
instruction.  
Table 9-3 lists the encoding for different types of prefix  
bytes.  
REP/REPE  
F3h  
Repeat the following string  
instruction.  
9.1.2 Opcode  
The opcode field specifies the operation to be performed  
by the instruction. The opcode field is either one or two  
bytes in length and may be further defined by additional  
bits in the mod r/m byte. Some operations have more than  
one opcode, each specifying a different form of the opera-  
tion. Certain opcodes name instruction groups. For exam-  
ple, opcode 80h names a group of operations that have  
an immediate operand and a register or memory operand.  
The reg field may appear in the second opcode byte or in  
the mod r/m byte.  
9.1.2.1 w Field (Operand Size)  
When used, the 1-bit w field selects the operand size dur-  
ing 16-bit and 32-bit data operations. See Table 9-4.  
Table 9-4. w Field Encoding  
Operand Size  
w
Field  
16-Bit Data  
Operations  
32-Bit Data  
Operations  
The opcode may contain w, d, s and eee opcode fields as  
shown in the Table 9-27 on page 213  
0
1
8 bits  
8 bits  
16 bits  
32 bits  
Revision 3.1  
203  
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