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30036-23 参数 Datasheet PDF下载

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型号: 30036-23
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内容描述: 的Geode ™ GXLV处理器系列的低功耗X86集成解决方案 [Geode⑩ GXLV Processor Series Low Power Integrated x86 Solutions]
分类和应用:
文件页数/大小: 247 页 / 4117 K
品牌: NSC [ National Semiconductor ]
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Processor Programming (Continued)  
3.7.1 SMM Operation  
SMM execution flow is summarized in Figure 3-10. Enter-  
ing SMM requires the assertion of the SMI# pin for at least  
two SYSCLK periods or execution of the SMINT instruction.  
For the SMI# signal or SMINT instruction to be recog-  
nized, the following configuration registers must be pro-  
grammed:  
SMI# Sampled Active or  
SMINT Instruction Executed  
SMAR (Index CDh-CFh) - The SMM Base address and  
size.  
CPU State Stored in SMM  
Address Space Header  
CCR1 (Index C1) - SMAC bit and/or USE_SMI bit.  
These registers formats are given in Table 3-11 on page  
52.  
Program Flow Transfers  
to SMM Address Space  
After triggering an SMM through the SMI# pin or a SMINT  
instruction, selected CPU state information is automati-  
cally saved in the SMM memory space header located at  
the top of SMM memory space. After saving the header,  
the CPU enters real mode and begins executing the SMM  
service routine starting at the SMM memory region base  
address.  
CPU Enters Real Mode  
The SMM service routine is user definable and may con-  
tain system or power management software. If the power  
management software forces the CPU to power down or if  
the SMM service routine modifies more registers than are  
automatically saved, the complete CPU state information  
should be saved.  
Execution Begins at SMM  
Address Space Base Address  
RSM Instruction Restores CPU  
State Using Header Information  
Normal Execution Resumes  
Figure 3-10. SMM Execution Flow  
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Revision 1.1