Integrated Functions (Continued)
SDRAM Refresh Cycle
Page Miss
Figure 4-7 shows a SDRAM auto refresh cycle. The mem-
ory controller always precedes the refresh cycle with a
PRE command to all banks.
Figure 4-8 shows a Read/WRT command after a page
miss cycle. In order to program the new row address, a
PRE command must be issued followed by an ACT com-
mand.
SDCLK
CS#
RAS#
CAS#
WE#
MA[10]
Figure 4-7. Auto Refresh Cycle
SDCLK
COMMAND
PRE
BA
NOP
NOP
ACT
NOP
NOP
R/W
COL
NOP
tRP
tRCD
ADDRESS
ROW
Figure 4-8. Read/WRT Command to a New Row Address
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