µPD75304B,75306B,75308B
Machine
Cycles
Address-
Mne-
Note
Bytes
Operand
Operation
Skip Condition
ing Area
monic
fmem.bit
2
2
2
2
2
2
2
2
2
2
2
2
2 + S Skip if (fmem.bit) = 1 and clear
*4
*5
*1
*4
*5
*1
*4
*5
*1
*4
*5
*1
(fmem.bit) = 1
pmem.@L
2 + S Skip if (pmem7–2 + L3–2.bit (L1–0)) = 1 and clear
2 + S Skip if (H + mem3–0.bit) = 1 and clear
(pmem.@L) = 1
(@H + mem.bit) = 1
SKTCLR
AND1
OR1
@H + mem.bit
CY, fmem.bit
CY, pmem.@L
CY, @H + mem.bit
CY, fmem.bit
CY, pmem.@L
CY, @H + mem.bit
CY, fmem.bit
CY, pmem.@L
CY, @H + mem.bit
2
2
2
2
2
2
2
2
2
CY ← CY (fmem.bit)
CY ← CY (pmem7–2 + L3–2.bit (L1–0))
CY ← CY (H + mem3-0.bit)
CY ← CY (fmem.bit)
CY ← CY (pmem7–2 + L3–2.bit (L1–0))
CY ← CY (H + mem3-0.bit)
CY ← CY (fmem.bit)
CY ← CY (pmem7–2 + L3–2.bit (L1–0))
CY ← CY (H + mem3-0.bit)
XOR1
● µPD75304B
PC11–0 ← addr
(The assembler selects the optimum
instruction from among the BRCB !caddr,
and BR $addr instructions.)
addr
—
—
*6
● µPD75306B, 75308B
PC12–0 ← addr
(The assembler selects the optimum
instruction from among the BR !addr, BRCB
!caddr, and BR $addr instructions.)
BR
● µPD75306B, 75308B
PC12–0 ← addr
*6
*7
!addr
$addr
3
1
3
2
● µPD75304B
PC11–0 ← addr
● µPD75306B, 75308B
PC12–0 ← addr
● µPD75304B
PC11–0 ← caddr11–0
!caddr
!addr
BRCB
CALL
2
3
2
3
*8
*6
● µPD75306B, 75308B
PC12–0 ← PC12 + caddr11–0
● µPD75304B
(SP – 4) (SP – 1) (SP – 2) ← PC11–0
(SP – 3) ← MBE, 0, 0, 0
PC11–0 ← addr, SP ← SP – 4
● µPD75306B, 75308B
(SP – 4) (SP – 1) (SP – 2) ← PC11–0
(SP – 3) ← MBE, 0, 0, PC12
PC12–0 ← addr, SP ← SP – 4
Note Instruction Group
42
NEC [ NEC ]
