µPD75304B,75306B,75308B
Note Mne-
Machine
Cycles
Address-
Bytes
Operand
Operation
Skip Condition
1
monic
AND
OR
ing Area
A, #n4
2
1
2
1
2
1
1
2
1
2
2
1
2
2
1
2
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
A ← A n4
A ← A (HL)
A ← A n4
A ← A (HL)
A ← A n4
A ← A (HL)
A, @HL
A, #n4
*1
*1
*1
2
A, @HL
A, #n4
1
2
XOR
A, @HL
A
1
RORC
NOT
1
CY ← A0, A3 ← CY, An–1 ← An
A ← A
A
2
reg
1 + S
2 + S
2 + S
1 + S
2 + S
2 + S
1 + S
2 + S
1
reg ← reg + 1
reg = 0
INCS
@HL
(HL) ← (HL) + 1
*1
*3
(HL) = 0
(mem) = 0
reg = FH
reg = n4
(HL) = n4
A = (HL)
A = reg
mem
(mem) ← (mem) + 1
reg ← reg – 1
DECS
reg
reg, #n4
@HL, #n4
A, @HL
A, reg
Skip if reg = n4
Skip if (HL) = n4
*1
*1
SKE
Skip if A = (HL)
Skip if A = reg
SET1
CLR1
SKT
CY
CY ← 1
CY
1
CY ← 0
CY
1 + S
1
Skip if CY = 1
CY = 1
NOT1
CY
CY ← CY
mem.bit
fmem.bit
pmem.@L
@H + mem.bit
mem.bit
fmem.bit
pmem.@L
@H + mem.bit
mem.bit
fmem.bit
pmem.@L
@H + mem.bit
mem.bit
fmem.bit
pmem.@L
@H + mem.bit
2
(mem.bit) ← 1
*3
*4
*5
*1
*3
*4
*5
*1
*3
*4
*5
*1
*3
*4
*5
*1
2
(fmem.bit) ← 1
SET1
CLR1
SKT
2
(pmem7–2 + L3–2.bit (L1–0)) ← 1
(H + mem3–0.bit) ← 1
(mem.bit) ← 0
2
2
2
(fmem.bit) ← 0
2
(pmem7–2 + L3–2.bit (L1–0)) ← 0
(H + mem3–0.bit) ← 0
Skip if (mem.bit) = 1
Skip if (fmem.bit) = 1
Skip if (pmem7–2 + L3–2.bit (L1–0)) = 1
Skip if (H + mem3–0.bit) = 1
Skip if (mem.bit) = 0
Skip if (fmem.bit) = 0
Skip if (pmem7–2 + L3–2.bit (L1–0)) = 0
Skip if (H + mem3–0.bit) = 0
2
2 + S
2 + S
2 + S
2 + S
2 + S
2 + S
2 + S
2 + S
(mem.bit) = 1
(fmem.bit) = 1
(pmem.@L) = 1
(@H + mem.bit) = 1
(mem.bit) = 0
(fmem.bit) = 0
(pmem.@L) = 0
(@H + mem.bit) = 0
SKF
Note 1. Instruction Group
2. Accumulator operation
3. Increment and decrement
4. Carry flag operation
41
NEC [ NEC ]
