CHAPTER 1 OVERVIEW OF EACH PRODUCT
(4) V850E/ME2
DRST, DCK,
DMS, DDI,
DCU
INTC
MEMC
SRAM
WAIT
HLDRQ
HLDAK
CPU
DDO, TRCCLK,
TRCDATA0 to TRCDATA3
,
TRCEND
BCU
A0 to A25
D0 to D31
NMI
INTP10, INTP11
INTP21 to INTP25
INTP50 to INTP52
INTP65 to INTP67
INTPD0 to INTPD15
INTPL0, INTPL1
PC
Instruction
queue
CS0, CS1, CS3,
CS4, CS6, CS7
Multiplier
(32 × 32 → 64)
Instruction cache
ROM
CS2/IOWR
CS5/IORD
BCYST
RD
8 KB
32-bit
barrel shifter
TCLR10, TCLR11
TIUD10, TIUD11
TCUD10, TCUD11
xxWR/xxBE
ALU
SDRAM
WR
Instruction RAM
TMENC1
BUSCLK
SDCKE
SDRAS
SDCAS
WE
INTP100, INTP110
INTP101, INTP111
128 KB
System
registers
TO10, TO11
TIC0 to TIC3
xxDQM
REFRQ
SELFREF
Data RAM
General-
INTPC00, INTPC01,
INTPC10, INTPC11,
INTPC20, INTPC21,
INTPC30, INTPC31
TOC0 to TOC3
purpose
TMC
16 KB
registers
(32 bits × 32)
DMARQ0 to DMARQ3
DMAAK0 to DMAAK3
TC0 to TC3
DMA
TOC4, TOC5
TMC
TMD
BBR
SI0/RXD0
SO0/TXD0
SCK0
PWM
ADC
PWM0, PWM1
CSI30/UARTB0
Ports
ANI0 to ANI7
ADTRG
SI1
SO1
CSI31
AVREFP, AVREFM
AVDD
SCK1
AVSS
RXD1
TXD1
UARTB1
UDP
UDM
UCLK
UVDD
USBF
SSEL0, SSEL1
JIT0, JIT1
PLLSEL
X1
RESET
X2
CG
MODE0, MODE1
OSCVDD
OSCVSS
PLLVDD
PLLVSS
System
controller
IVDD
IVSS
EVDD
EVSS
Remark xx: LL, LU, UL, UU
28
Application Note U17121EJ1V1AN
NEC [ NEC ]
