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UPD43256BCZ-70LL 参数 Datasheet PDF下载

UPD43256BCZ-70LL图片预览
型号: UPD43256BCZ-70LL
PDF下载: 下载PDF文件 查看货源
内容描述: 256K - BIT的CMOS静态RAM的32K字×8位 [256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 24 页 / 174 K
品牌: NEC [ NEC ]
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µPD43256B  
Write Cycle (1/2)  
VCC 4.5 V  
µPD43256B-85  
Parameter  
Symbol  
µPD43256B-70  
µPD43256B-A85/A10/A12  
µPD43256B-B10/B12/B15  
Unit Condition  
MIN.  
MAX.  
MIN.  
85  
70  
70  
60  
35  
0
MAX.  
Write cycle time  
tWC  
tCW  
tAW  
tWP  
tDW  
tDH  
70  
50  
50  
55  
30  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CS to end of write  
Address valid to end of write  
Write pulse width  
Data valid to end of write  
Data hold time  
Address setup time  
tAS  
0
0
Write recovery time  
tWR  
tWHZ  
tOW  
0
0
WE to output in high impedance  
Output active from end of write  
30  
30  
ns  
ns  
Note  
10  
10  
Note See the output load shown in Figure 2 except for µPD43256B-A, 43256B-B.  
Remark These AC characteristics are in common regardless of package types and L, LL versions.  
Write Cycle (2/2)  
VCC 3.0 V  
VCC 2.7 V  
Con-  
Parameter  
Symbol µPD43256B-A85 µPD43256B-A10 µPD43256B-A12 µPD43256B-B10 µPD43256B-B12 µPD43256B-B15 Unit  
dition  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Write cycle time  
tWC  
tCW  
tAW  
tWP  
tDW  
tDH  
85  
70  
70  
60  
60  
0
100  
70  
70  
60  
60  
0
120  
90  
90  
80  
70  
0
100  
70  
70  
60  
60  
0
120  
90  
90  
80  
70  
0
150  
100  
100  
90  
80  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CS to end of write  
Address valid to end of write  
Write pulse width  
Data valid to end of write  
Data hold time  
Address setup time  
tAS  
0
0
0
0
0
0
Write recovery time  
tWR  
tWHZ  
tOW  
0
0
0
0
0
0
WE to output in high impedance  
Output active from end of write  
30  
35  
40  
35  
40  
50 ns Note  
10  
10  
10  
10  
10  
10  
ns  
Note Loading condition is 1TTL + 100 pF.  
Remark These AC characteristics are in common regardless of package types and L, LL versions.  
12