CHAPTER 7 8-BIT TIMER
(4) 8-bit timer counters 50 and 60 (TM50 and TM60)
These are 8-bit registers that are used to count the count pulse.
TM50 and TM60 are read with an 8-bit memory manipulation instruction.
RESET input sets TM50 and TM60 to 00H.
TM50 and TM60 are cleared to 00H under the following conditions.
(a) Discrete mode
(i) TM50
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After reset
When TCE50 (bit 7 of 8-bit timer mode control register 50 (TMC50)) is cleared to 0
When a match occurs between TM50 and CR50
When the TM50 count value overflows
(ii) TM60
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After reset
When TCE60 (bit 7 of 8-bit timer mode control register 60 (TMC60)) is cleared to 0
When a match occurs between TM60 and CR60
When the TM60 count value overflows
(b) Cascade connection mode (TM50 and TM60 are simultaneously cleared to 00H)
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After reset
When the TCE60 flag is cleared to 0
When matches occur simultaneously between TM50 and CR50 and between TM60 and CR60
When the TM50 and TM60 count values overflow simultaneously
(c) Carrier generator mode
(i) TM50
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After reset
When the TCE50 flag is cleared to 0
When a match occurs between TM50 and CR50
(ii) TM60
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After reset
When the TCE60 flag is cleared to 0
When a match occurs between TM60 and CR60
When a match occurs between TM60 and CRH60
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User’s Manual U15075EJ1V0UM00
NEC [ NEC ]
