NTC Proprietary
Level: Property
DDR3(L)-2Gb SDRAM
NT5CB(C)256M8JQ/NT5CB(C)128M16JR
Burst Refresh Current
CKE: High; External clock: On;
tCK, CL, nRFC: see the table of Timings used for IDD and IDDQ;
BL: 8(1); AL: 0;
: High between REF;
Command, Address, Bank Address Inputs: partially toggling;
Data IO: MID-LEVEL;
IDD5B
DM:stable at 0;
Bank Activity: REF command every nRFC;
Output Buffer and RTT: Enabled in Mode Registers(2);
ODT Signal: stable at 0;
Self Refresh Current: Normal Temperature Range
TCASE: Normal Temperature Range;
Auto Self-Refresh (ASR): Disabled(4);
Self-Refresh Temperature Range (SRT):Normal(5);
CKE: Low; External clock: Off;
CK and : LOW; CL: see the table of Timings used for IDD and IDDQ;
BL: 8(1);AL: 0;
IDD6
, Command, Address, Bank Address, Data IO: MID-LEVEL;
DM:stable at 0;
Bank Activity:Self-Refresh operation;
Output Buffer and RTT: Enabled in Mode Registers(2);
ODT Signal: MID-LEVEL
Self-Refresh Current: Extended Temperature Range (6)
TCASE: Extended Temperature Range;
Auto Self-Refresh (ASR): Disabled(4);
Self-Refresh Temperature Range (SRT):Extended(5);
CKE: Low; External clock: Off; CK and : LOW; CL: see the table of Timings used for IDD and IDDQ;
BL: 8(1);AL: 0;
IDD6ET
, Command, Address, Bank Address, Data IO: MID-LEVEL;
DM:stable at 0;
Bank Activity:Extended Temperature Self-Refresh operation;
Output Buffer and RTT: Enabled in Mode Registers(2);
ODT Signal: MID-LEVEL
Auto Self-Refresh Current (6)
Auto Self-Refresh (ASR): Enabled(4);
Self-Refresh Temperature Range (SRT):Normal(5);
IDD6TC
Version 1.4
05/2019
124
Nanya Technology Cooperation ©
All Rights Reserved.
NANYA [ Nanya Technology Corporation. ]
