Freescale Semiconductor, Inc.
Appendix: 68HC912D60A EEPROM
EEDIV[9:0] — Prescaler divider
Loaded from SHADOW word at reset.
Read anytime. Write once in normal modes (SMODN =1) if EELAT =
0 and anytime in special modes (SMODN =0) if EELAT = 0.
The prescaler divider is required to produce a self-time clock with a
fixed frequency around 28.6 Khz for the range of oscillator
frequencies. The divider is set so that the oscillator frequency can be
divided by a divide factor that can produce a 35 µs +/- 2µs pulse.
CAUTION: An incorrect or uninitialized value on EEDIV can result in overstress of
EEPROM array during program/erase operation. It is also strongly
recommend not to program EEPROM with oscillator frequencies less
than 250 Khz.
The EEDIV value is determined by the following formula:
–6
EEDIV = INT[EXTALi (hz) x 35×10 + 0.5]
NOTE: INT[A] denotes the round down integer value of A. Program/erase cycles
will not be activated when EEDIV = 0.
Table 23-1. EEDIV Selection
Osc Freq.
16 Mhz
8 Mhz
Osc Period
62.5ns
125ns
250ns
500ns
1µs
Divide Factor
EEDIV
$0230
$0118
$008C
$0046
$0023
$0012
$0009
560
280
140
70
4 Mhz
2 Mhz
1 Mhz
35
500 Khz
250 Khz
2µs
4µs
18
9
EEMCR — EEPROM Module Configuration
$00F0
Bit 7
6
5
4
3
1
1
2
1
Bit 0
DMY
0
RESERVED(1)
NOBDML
NOSHW
EESWAI PROTLCK
(2)
(2)
(2)
(2)
RESET:
—
—
—
—
1
0
1. Bits 4 and 5 have test functions and should not be programmed.
2. Loaded from SHADOW word.
Advance Information
68HC(9)12D60 — Rev 4.0
MOTOROLA
410
Appendix: 68HC912D60A EEPROM
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MOTOROLA [ MOTOROLA ]
