Freescale Semiconductor, Inc.
Electrical Specifications
5. This characteristic is affected by clock stretch.
Add N × tcyc where N = 0, 1, 2, or 3, depending on the number of clock stretches.
6. Without TAG enabled.
1
2
3
ECLK
R/W
16
17
18
19
20
21
LSTRB
(W/O TAG ENABLED)
23
11
5
7
22
12
10
READ
ADDRESS
DATA
ADDRESS/DATA
MULTIPLEXED
9
8
13
15
14
WRITE
ADDRESS
DATA
24
25
26
DBE
NOTE: Measurement points shown are 20% and 70% of VDD
Figure 20-10. Multiplexed Expansion Bus Timing Diagram
Advance Information
382
68HC(9)12D60 — Rev 4.0
MOTOROLA
Electrical Specifications
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