Freescale Semiconductor, Inc.
Development Support
Bit 7
Bit 15
0
6
14
0
5
13
0
4
12
0
3
11
0
2
10
0
1
9
0
Bit 0
Bit 8
0
RESET:
BRKDH — Breakpoint Data Register, High Byte
$0024
These bits are compared to the most significant byte of the data bus or
the most significant byte of the address bus in dual address modes.
BKEN[1:0], BKDBE, and BKMBH control how this byte will be used in the
breakpoint comparison.
Bit 7
Bit 7
0
6
6
0
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
Bit 0
Bit 0
0
RESET:
BRKDL — Breakpoint Data Register, Low Byte
$0025
These bits are compared to the least significant byte of the data bus or
the least significant byte of the address bus in dual address modes.
BKEN[1:0], BKDBE, BK1ALE, and BKMBL control how this byte will be
used in the breakpoint comparison.
19.6 Instruction Tagging
The instruction queue and cycle-by-cycle CPU activity can be
reconstructed in real time or from trace history that was captured by a
logic analyzer. However, the reconstructed queue cannot be used to
stop the CPU at a specific instruction, because execution has already
begun by the time an operation is visible outside the MCU. A separate
instruction tagging mechanism is provided for this purpose.
Executing the BDM TAGGO command configures two MCU pins for
tagging. The TAGLO signal shares a pin with the LSTRB signal, and the
Advance Information
362
68HC(9)12D60 — Rev 4.0
Development Support
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA [ MOTOROLA ]
