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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Development Support  
TAGHI signal shares a pin with the BKGD signal. Tagging information is  
latched on the falling edge of ECLK.  
Table 19-12 shows the functions of the two tagging pins. The pins  
operate independently - the state of one pin does not affect the function  
of the other. The presence of logic level zero on either pin at the fall of  
ECLK performs the indicated function. Tagging is allowed in all modes.  
Tagging is disabled when BDM becomes active and BDM serial  
commands are not processed while tagging is active.  
Table 19-12. Tag Pin Function  
TAGHI  
TAGLO  
Tag  
1
1
0
0
1
0
1
0
no tag  
low byte  
high byte  
both bytes  
The tag follows program information as it advances through the queue.  
When a tagged instruction reaches the head of the queue, the CPU  
enters active background debugging mode rather than execute the  
instruction.  
Advance Information  
363  
68HC(9)12D60 — Rev 4.0  
Development Support  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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