Freescale Semiconductor, Inc.
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The scope of comparison can be expanded by ignoring the least
significant byte of address or data matches.
The scope of comparison can be limited to program data only by setting
the BKPM bit in breakpoint control register 0.
To trace program flow, setting the BKPM bit causes address comparison
of program data only. Control bits are also available that allow checking
read/write matches.
Bit 7
BKEN1
0
6
BKEN0
0
5
BKPM
0
4
0
0
3
BK1ALE
0
2
BK0ALE
0
1
0
0
Bit 0
0
0
RESET:
BRKCT0 — Breakpoint Control Register 0
$0020
Read and write anytime.
This register is used to control the breakpoint logic.
BKEN1, BKEN0 — Breakpoint Mode Enable
Table 19-9. Breakpoint Mode Control
BKEN1 BKEN0
Mode Selected
Breakpoints Off
SWI — Dual Address Mode
BDM — Full Breakpoint Mode
BDM — Dual Address Mode
BRKAH/L Usage BRKDH/L Usage R/W
Range
0
0
1
1
0
1
0
1
—
—
—
—
Address Match
Address Match
Address Match
Address Match
Data Match
Address Match
No
Yes
Yes
Yes
Yes
Yes
BKPM — Break on Program Addresses
This bit controls whether the breakpoint will cause a break on a match
(next instruction boundary) or on a match that will be an executable
opcode. Data and non-executed opcodes cannot cause a break if this
bit is set. This bit has no meaning in SWI dual address mode. The
SWI mode only performs program breakpoints.
0 = On match, break at the next instruction boundary
1 = On match, break if the match is an instruction that will be
executed. This uses tagging as its breakpoint mechanism.
Advance Information
358
68HC(9)12D60 — Rev 4.0
Development Support
MOTOROLA
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