Freescale Semiconductor, Inc.
Enhanced Capture Timer
Timer and Modulus Counter Operation in Different Modes
14.5 Timer and Modulus Counter Operation in Different Modes
STOP:
BGDM:
Timer and modulus counter are off since clocks are stopped.
Timer and modulus counter keep on running, unless TSBCK
(REG$86, bit5) is set to one.
WAIT:
Counters keep on running, unless TSWAI in TSCR ($86) is
set to one.
NORMAL: Timer and modulus counter keep on running, unless TEN in
TSCR($86) respectively MCEN in MCCTL ($A6) are
cleared.
TEN=0:
All 16-bit timer operations are stopped, can only access the
registers.
MCEN=0: Modulus counter is stopped.
PAEN=1: 16-bit Pulse Accumulator A is active.
PAEN=0: 8-Bit Pulse Accumulators 3 and 2 can be enabled. (see
ICPACR)
PBEN=1: 16-bit Pulse Accumulator B is active.
PBEN=0: 8-Bit Pulse Accumulators 1 and 0 can be enabled. (see
ICPACR)
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
Enhanced Capture Timer
235
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