MCU
REQUESTING DEVICE
REQUEST THE BUS
1) ASSERT BUS REQUEST (BR)
GRANT BUS ARBITRATION
1) ASSERT BUS GRANT (BG)
ACKNOWLEDGE BUS MASTERSHIP
1) EXTERNAL ARBITRATION DETERMINES
NEXT BUS MASTER
2) NEXT BUS MASTER WAITS FOR BGACK
TO BE NEGATED
3) NEXT BUS MASTER ASSERTS BGACK
TO BECOME NEW MASTER
4) BUS MASTER NEGATES BR
TERMINATE ARBITRATION
1) NEGATE BG (AND WAIT FOR
BGACK TO BE NEGATED)
OPERATE AS BUS MASTER
1) PERFORM DATA TRANSFERS (READ AND
WRITE CYCLES) ACCORDING TO THE
SAME RULES THE PROCESSOR USES
4
RELEASE BUS MASTERSHIP
1) NEGATE BGACK
RE-ARBITRATE OR RESUME PROCESSOR
OPERATION
BUS ARB FLOW
Figure 4-14 Bus Arbitration Flowchart for Single Request
State changes occur on the next rising edge of CLKOUT after the internal signal is val-
id. The BG signal transitions on the falling edge of the clock after a state is reached
during which G changes. The bus control signals (controlled by T) are driven by the
MCU immediately following a state change, when bus mastership is returned to the
MCU. State 0, in which G and T are both negated, is the state of the bus arbiter while
the MCU is bus master. Request R and acknowledge A keep the arbiter in state 0 as
long as they are both negated.
4.5.6.1 Slave (Factory Test) Mode Arbitration
This mode is used for factory production testing of internal modules. It is not supported
as a user operating mode. Slave mode is enabled by holding DATA11 low during re-
set. In slave mode, when BG is asserted, the MCU is slaved to an external master that
has full access to all internal registers.
4.5.6.2 Show Cycles
The MCU normally performs internal data transfers without affecting the external bus,
but it is possible to show these transfers during debugging. AS is not asserted exter-
nally during show cycles.
MC68331
SYSTEM INTEGRATION MODULE
MOTOROLA
4-35
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
