Table D-4 Port E Pin Assignments
PEPAR Bit
Port E Signal
PE7
Bus Control Signal
PEPA7
PEPA6
PEPA5
PEPA4
PEPA3
PEPA2
PEPA1
PEPA0
SIZ1
SIZ0
PE6
PE5
AS
PE4
DS
PE3
RMC
PE2
AVEC
DSACK1
DSACK0
PE1
PE0
D.3.9 PORTF0/PORTF1 — Port F Data Register
$YFFA19, $YFFA1B
15
8
7
6
5
4
3
2
1
0
NOT USED
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
RESET:
U
U
U
U
U
U
U
U
PORTF is an internal data latch that can be accessed at two locations. It can be read
or written at any time. If a pin in I/O port F is configured as an output, the corresponding
bit value is driven out on the pin. When a pin is configured for output, a read of PORTF
returns the latched bit value; when a pin is configured for input, a read returns the pin
logic level.
D
D.3.10 DDRF — Port F Data Direction Register
$YFFA1D
15
8
7
6
5
4
3
2
1
0
NOT USED
DDF7 DDF6 DDF5 DDF4 DDF3 DDF2 DDF1 DDF0
RESET:
0
0
0
0
0
0
0
0
Bits in this register control the direction of the port F pin drivers when pins are config-
ured for I/O. Setting a bit configures the corresponding pin as an output; clearing a bit
configures the corresponding pin as an input. This register can be read or written at
any time.
D.3.11 PFPAR — Port F Pin Assignment Register
$YFFA1F
15
8
7
6
5
4
3
2
1
0
NOT USED
PFPA7
PFPA6
PFPA5
PFPA4
PFPA3
PFPA2
PFPA1
PFPA0
RESET:
DATA9
DATA9
DATA9
DATA9
DATA9
DATA9
DATA9
DATA9
Bits in this register determine the function of port F pins. Setting a bit assigns the cor-
responding pin to a control signal; clearing a bit assigns the pin to port F.
MOTOROLA
D-18
REGISTER SUMMARY
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
