D.2.13 TFLG1/TFLG2 — Timer Interrupt Flag Registers 1 and 2
$YFF922
15
I4/O5F
RESET:
0
14
11
10
8
7
6
0
5
4
3
0
2
0
1
0
0
0
OCF
ICF
0
TOF
PAOVF
PAIF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
These registers show condition flags that correspond to GPT events. If the corre-
sponding interrupt enable bit in TMSK1/TMSK2 is set, an interrupt occurs.
I4/O5F — Input Capture 4/Output Compare 5 Flag
When I4/O5 in PACTL is zero, this flag is set each time TCNT matches the TOC5 val-
ue in TI4/O5. When I4/O5 in PACTL is one, the flag is set each time a selected edge
is detected at the I4/O5 pin.
OCF[4:1] — Output Compare Flags
An output compare flag is set each time TCNT matches the corresponding TOC reg-
ister. OCF[4:1] correspond to OC[4:1].
ICF[3:1] — Input Capture Flags
D
A flag is set each time a selected edge is detected at the corresponding input capture
pin. ICF[3:1] correspond to IC[3:1].
TOF — Timer Overflow Flag
This flag is set each time TCNT advances from a value of $FFFF to $0000.
PAOVF — Pulse Accumulator Overflow Flag
This flag is set each time the pulse accumulator counter advances from a value of $FF
to $00.
PAIF — Pulse Accumulator Flag
In event counting mode, this flag is set when an active edge is detected on the PAI pin.
In gated time accumulation mode, it is set at the end of the timed period.
D.2.14 CFORC — Compare Force Register
PWMC — PWM Control Register C
$YFF924
$YFF925
15
11
10
0
9
8
7
6
0
4
0
3
2
1
0
FOC
FPWMA FPWMB
PPROUT
PPR
0
SFA
SFB
F1A
F1B
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
Setting a bit in CFORC causes a specific output on OC or PWM pins. PWMC sets
PWM operating conditions.
FOC[5:1] — Force Output Compare
0 = Has no meaning.
1 = Causes pin action programmed for corresponding OC pin, but the OC flag is
not set.
FOC[5:1] correspond to OC[5:1].
MOTOROLA
D-10
REGISTER SUMMARY
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
